| 摘要 |
PROBLEM TO BE SOLVED: To effectively utilize an operable arithmetic processor without increasing the number of buses even when the number of input signal lines to input signals is increased. SOLUTION: This signal processor is provided with transfer signal lines 13a-13c for transferring signals from respective operating modules 12a-12d to the adjacent operating modules. Input signals fetched into the device by input signal lines 1a-1f and switched by a selector 10 are merged for the prescribed number of lines by mergers 11a-11d. In the individual operating modules, these merged signals or signals transferred from the adjacent operating modules through the transfer signal lines are processed and the processing results are merged by a merging processor 15 and sent outside the device.
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