发明名称 OUTPUT BUFFER FOR RECEIVER ADOPTING LOW VOLTAGE DIFFERENTIAL SIGNAL SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a tri-state CMOS output buffer that has an output node and a protection circuit for preventing an integrated circuit from being destroyed, when a bus voltage exceeds a power supply reference voltage. SOLUTION: A half bus circuit 224 of this output buffer blocks an output voltage passing through a final output stage, resulting in destruction of an output buffer 200, when an output voltage applied to an output node exceeds a supply vltage. A protection circuit employs a clamping circuit 210, a switching circuit 212, and a back gate bias circuit 206 to block a leakage path between a power supply reference voltage Vcc and an output node OUT passing through a source/bulk junction of a transistor that is biased in the output buffer.
申请公布号 JP2000252813(A) 申请公布日期 2000.09.14
申请号 JP20000037580 申请日期 2000.02.16
申请人 TEXAS INSTR INC <TI> 发明人 MORGAN MARK W;CARVAJAL FERNANDO D
分类号 H03K19/0175;H03F1/52;H03K19/003;H04B1/18;(IPC1-7):H03K19/017 主分类号 H03K19/0175
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