发明名称 SIGNAL PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a signal processing system that can conduct an arithmetic operation with few errors at a reduced cost, in spite of a simple configuration. SOLUTION: In this signal processing system, two-channel analog signals A, B are given respectively to an A/D converter ADC1, where they are converted into digital signals. Each digital signal consisting of digital signals A, B in time division is fed to a digital signal processor DSP1. Since the phases of the digital signals A, B give to the DSP1 are deviated from each other, they are first input to digital phase shift filters 12a, 12b, where the phases are matched. Then the digital signals A, B are fed to an arithmetic processing block 13, where an arithmetic operation is conducted. If higher precision is a requirement, the signal processing system is provided further with filters 11a, 11b or the like that adjust (correct) a frequency characteristic of the phase shift filters.
申请公布号 JP2000252824(A) 申请公布日期 2000.09.14
申请号 JP19990055702 申请日期 1999.03.03
申请人 TOSHIBA CORP 发明人 KAWAGUCHI SHINJI
分类号 H03M1/12;H03H17/00;H03H17/08;(IPC1-7):H03M1/12 主分类号 H03M1/12
代理机构 代理人
主权项
地址