| 摘要 |
PROBLEM TO BE SOLVED: To avoid the expansion of circuit scale by changing the size of data transfer between a cache and a main memory into determined size when executing data transfer. SOLUTION: A data reference characteristic analyzer 3 analyzes a reference request from an arithmetic device 1 and calculates a hit rate or number of times of hit occurrence per unit time in the case of enlarging or reducing the data transfer size. Then, a data transfer size controller 4 determines the suitable size to be used for data transfer from the number of times of hit occurrence of the data reference characteristic analyzer 3 and a present hit rate or number of times of hit occurrence per unit time and in that size, the data transfer is performed between a temporary storage device 2 and a storage device 5. Thus, the expansion of circuit scale can be avoided.
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