发明名称 DIGITAL FILTER, INTEGRATED CIRCUIT AND DIGITAL FILTER SYSTEM
摘要 PROBLEM TO BE SOLVED: To obtain a digital filter where an input data delay section and an arithmetic section can be operated by using operating timing signals whose periods differ from each other resulting in the facilitation of extension of a degree of parallelism thereby attaining high speed pressing. SOLUTION: The digital filter is provided with input data delay sections 1-3 that delay digital data Din received in time series and with arithmetic sections 4-13 that apply an arithmetic operation to digital data a1-c1 delayed by the input data delay sections 1-3, and the filter processing is conducted by applying the arithmetic operation to the digital data a1-c1 by means of the arithmetic sections 4-13. A 1st operating timing signal CLK whose period is equal to that of the received digital data Din is given to the input data delay sections 1-3, and the 1st operating timing signal CLK and a 2nd operating timing signal LD whose period is longer than that of the 1st operating timing signal CLK are given to the arithmetic sections 4-13.
申请公布号 JP2000252793(A) 申请公布日期 2000.09.14
申请号 JP19990049054 申请日期 1999.02.25
申请人 SUMITOMO METAL IND LTD 发明人 HASHIZUME AKIYOSHI;YANAI AKIHIRO;KONO MASAHIRO;KATO MASAHIRO
分类号 H03H17/02;(IPC1-7):H03H17/02 主分类号 H03H17/02
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