发明名称 SYNCHRONIZING CIRCUIT FOR MULTI-CARRIER RECEPTION DEVICE AND MULTI-CARRIER RECEPTION DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a distinct and sure synchronizing signal in a multi-carrier reception device to which a guard interval (GI) is inserted. SOLUTION: Correlation signals RI and RQ of signals I' and Q' obtained by delaying signals I and Q subjected to quadrature demodulation by delay circuits 111 and 112 are calculated by multiplication circuits 121 and 122. Absolute values ARI and ARQ of correlation signals RI and RQ are calculated by absolute value calculation circuits 131 and 132, and thereafter, the sum ARI+ ARQ is calculated by an addition circuit 14. By a synchronizing signal based on the sum ARI+ARQ, a peak is easily detected even if the peak is weak in either of correlation signals RI and RQ. By the synchronizing signal based on the sum ARI+ARQ, a peak to be the synchronizing signal is easily detected even if there are many peaks other than the peak to be the synchronizing signal in either of correlation signals RI and RQ.</p>
申请公布号 JP2000252948(A) 申请公布日期 2000.09.14
申请号 JP19990049930 申请日期 1999.02.26
申请人 TOYOTA CENTRAL RES & DEV LAB INC 发明人 SHIBATA TSUGUYUKI;ITO NOBURO;ITO HIDEAKI;OTSUKA KAZUO;FUJIMOTO YOSHITOSHI;SUZUKI TOKUSHO
分类号 H04J11/00;H04L7/00;(IPC1-7):H04J11/00 主分类号 H04J11/00
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