| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide an integrated circuit that reduces a standby consumption current and correctly outputs a reset signal with respect to whatever rising rate of a power supply voltage. SOLUTION: In this integrated circuit, when the rising of a power supply voltage is fast at application of power, a reset signal is set to a low level, a PMOS transistor(TR) T1 is conductive to set a node N1 to a high level. Since the node N1 is also connected to a ground line VSS via an NMOS TR T2, the node N1 is changed from high level to low level, without a delay by selecting a small resistance to a resistor R1 because the NMOS TR T2 is conductive, when the poser supply voltage reaches a prescribed voltage. This changes causes a node N2 to the high level and a node N3 to the high level so as to output a high level reset signal. While the reset signal is set at the high level, the PMOS TR T1 is set non-conductive to interrupt the current flowing thereto.</p> |
