发明名称 FIELD EFFECT TRANSISTOR AND MANUFACTURE THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a path for discharging excessive holes in an SOI-MOSFET while reducing a parasitic capacitance. SOLUTION: A semiconductor layer 3 is formed on a semiconductor substrate 1 with an insulating film in between. A gate electrode 8 is formed on the semiconductor substrate 3 with an insulating film 7. A semiconductor layer under the gate electrode 8 constitutes a channel forming region 5 doped with low- density impurity. A carrier path region 12 with its surface located below the surface of the channel forming region 5 is formed with a given width in a region that borders on the channel forming region 5, and the carrier path region 12 is connected to a body contact.
申请公布号 JP2000252471(A) 申请公布日期 2000.09.14
申请号 JP19990052322 申请日期 1999.03.01
申请人 NEC CORP 发明人 KO RISHO
分类号 H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L29/786
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