Microprocessor capable of unpacking packed data in response to a unpack instruction

摘要

A microprocessor capable of unpacking packed data in response to an unpack instruction. The microprocessor having a a storage area to store a first packed data and a second packed data respectively including a first plurality of data elements and a second plurality of data elements, wherein each data element in the first plurality of data elements corresponds to a different data element in the second plurality of data elements, in a respective position. The microprocessor also includes a circuit that simultaneously copies less than all data elements from the first plurality of data elements and corresponding data elements from the second plurality of data elements into a storage area as a third plurality of separate data elements in a third packed data in response to the unpack instruction.