发明名称 Apparatus for generating a signal whose phase is synchronized with an inputted digital signal
摘要 A specific pattern in an inputted digital signal is detected and the input digital signal is sampled and held in accordance with such a detection output. A clock whose phase is synchronized with the input digital signal is generated on the basis of the sampling output. With such a construction as mentioned above, the phase of the clock can be optimally controlled by a simple construction. The clock can be precisely extracted from the input digital signal, so that the operation of a circuit is also stable.
申请公布号 US6118606(A) 申请公布日期 2000.09.12
申请号 US19970939679 申请日期 1997.09.29
申请人 CANON KABUSHIKI KAISHA 发明人 SASAKI, YOSHIYUKI;YAMASHITA, SHINICHI
分类号 G11B20/14;H03L7/091;H04N5/93;(IPC1-7):G11B5/09;G11B5/035 主分类号 G11B20/14
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