| 摘要 |
A DC offset correction arrangement compensates for DC offset introduced into a signal processing path of a device such as a data radio for application to a downstream digital data signal analyzer. During an off-line, calibration cycle, DC offset is measured by a successive approximation DC offset measurement circuit, which stores a multibit output digital code representative of the measured offset. This code is coupled to a DC offset correction circuit, which supplies selected signal processing components, such as a negative feedback low-pass filter coupled and a buffer amplifier, with a correction current that causes the supplied components to inject prescribed portions of a binarily weighted correction voltage that effectively cancels the measured DC offset.
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