| 摘要 |
An ATM switch system including input and output ports with associated buffers (12a, 14c, 16a, 12b, 14b, 16b), source traffic control system including shared bus coupling the ports, and arbiter controlling the transfer of data. The arbiter monitors the internal destination addresses of the ATM cells, and increments a counter (32a, 32b) associated with the destination port when the destination corresponds, and decrements other counters which do not correspond to the destination. Bursts for a particular output port cause the count of the associated counter to grow large; whereas long breaks cause the count to drop. The counts are compared to a high threshold (125) which alerts arbiter (170) to the danger of output port buffer overflowing. Upon receiving the alert, arbiter (170) either stalls by refusing to grant access until the counter decrements below the first threshold, or grants bus access to the input port associated with the output port. A low threshold (140) is utilized to declare that burst is over and to free the counter for tracking a new burst to the same or a different output port. |
