发明名称 DATA SYNCHRONIZATION TAKE-IN CIRCUIT, SYNCHRONIZATION METHOD AND MEMORY INTEGRATED CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To reduce power consumption and/or to improve performance by receiving the data signal and the timing signal of full swing as inputs, converting them into voltage levels that are stepped down and synchronizing the data/ timing signals with voltage level signals that are stepped down. SOLUTION: This data synchronization take-in circuit 200 can receive/output a full swing signal and synchronizes data take-in by generating and using a step-down signal. A timing driver circuit 202 receives a full swing timing signal by an input node 208. The timing driver circuit 202 not only adds delay required for taking in appropriate data in a reception circuit to the full swing timing signal but also shifts the voltage level of the timing signal and outputs the timing signal which is stepped down. The voltage level of the timing signal which is stepped down is stepped down and the stepped down level is lower than the voltage level of the full swing signal.</p>
申请公布号 JP2000244470(A) 申请公布日期 2000.09.08
申请号 JP20000035978 申请日期 2000.02.14
申请人 INFINEON TECHNOL NORTH AMERICA CORP;INTERNATL BUSINESS MACH CORP <IBM> 发明人 HANSON DAVID RUSSELL;MUELLER GERHARD
分类号 G11C11/413;G11C7/10;G11C11/407;G11C11/409;G11C11/417;H03K5/00;H04L7/00;H04L7/02;H04L25/40;(IPC1-7):H04L7/02 主分类号 G11C11/413
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