发明名称 SERIAL DATA CONTROLLER
摘要 PROBLEM TO BE SOLVED: To improve the reliability between a microcomputer and a device by detecting whether or not serial data transferred from a CPU has an error and transmitting only error-free data to the device. SOLUTION: An error detecting circuit 10 detects whether or not the serial data transferred from the CPU has an error and transmits only error-free data to the device. A command analysis block 11 of the error detecting circuit 10 decides whether serial data sent out of the microcomputer 20 is normal data or a data clear command. A comparator 13 compares data in fetch buffers 11a to 11c and a resending request block 14 sends a request to resend serial data to the microcomputer 20 when the compared data are discrepant. An STB decision block 12 decides which device the serial data are communicated to. A clock generating circuit 15 generates a clock needed for serial communication to be set to a device.
申请公布号 JP2000242570(A) 申请公布日期 2000.09.08
申请号 JP19990041992 申请日期 1999.02.19
申请人 NEC CORP 发明人 WATANABE YOSHIKI
分类号 G06F13/38;G06F13/00;(IPC1-7):G06F13/00 主分类号 G06F13/38
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