发明名称 CIRCUIT AND METHOD FOR SELECTING SIGNAL
摘要 PROBLEM TO BE SOLVED: To obtain a multi-stage multiplexer type signal selecting circuit with which power consumption is saved by suppressing a switching operation. SOLUTION: The circuit is constituted of seven multiplexers M00-M20 which are connected in a three-stage tree shape. They select one of input signals A and B in accordance with control signals S2, S1 and S0 and output it when an updating permission signal ENA of a state 1 is inputted from an external part, supply the updating permission signal E of the state 1 to the low-order multiplexer which is selected and supply the updating permission signal E of the state 0 to the low-order multiplexer which is not selected. The multiplexer to which the signal E of the state 0 is supplied holds previous contents and the switching operation is stopped. In a result, switching is operated only in the multiplexer where the input signals D0-D7 outputted as an output signal OUT pass through and one of the input signals D0-D7 is selected and outputted to an external bus.
申请公布号 JP2000244293(A) 申请公布日期 2000.09.08
申请号 JP19990042919 申请日期 1999.02.22
申请人 NEC CORP 发明人 NISHIZAWA TAKAHIKO
分类号 H03K5/00;H03K17/00;H03K17/693;H04Q3/52;(IPC1-7):H03K17/00 主分类号 H03K5/00
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