| 摘要 |
PROBLEM TO BE SOLVED: To provide a manufacture of a semiconductor device capable of preventing increase in parasitic capacitance and reduction of an operation speed even when an upper layer gate electrode and a lower layer gate electrode have an extension part from an SOI layer to an element isolation region in a back gate MOSFET of an SOI-type semiconductor layer. SOLUTION: In this manufacture of a semiconductor device having an element isolation region and an active region adjacent thereto, a trench T for isolating an element is formed in the element isolation region in a first substrate 10 made of semiconductor, a first insulating film 21 is formed in the trench and continuously on the first substrate, the first substrate surface is exposed at least in the active region and an opening X is formed in the first insulating film so as to be shallower than the bottom of the trench in the element isolation region. Subsequently, a lower layer gate insulating film and a lower layer gate electrode are formed in the opening, a second insulating film is formed on the lower layer gate electrode and the upper layer of the first insulating film, a second substrate is laminated on top thereof, and a first semiconductor substrate is ground using the first insulating film in the element isolation region as a stopper.
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