发明名称 TFT SUBSTRATE AND METHOD FOR ARRANGING TFT SUBSTRATE ON POLY-CHAMFERED GLASS SUBSTRATE
摘要 <p>PROBLEM TO BE SOLVED: To prevent discharging between adjacent TP part wirings even though a TP part wiring is electrically charged by peel charge, etc., during a manufacturing process of a thin film transistor(TFT) substrate by arranging a 1st transfer pad(TP) and a 2nd TP at the positions symmetrical to a specific straight line as a symmetrical axis. SOLUTION: First TPs 1021, 1022 including a 1st TP part wirings formed by a 1st wiring layer are arranged at the corners Q, S parts of a TFT substrate 10, and 2nd TPs 1031, 1032 including a 2nd TP wirings formed by a 2nd wiring layer arranged at the corners P, R. The TPs 1021-1032 are mutually in a symmetrical positional relation with respect to symmetry axes 1, 2 parallel to the sides of the TFT substrate 10 and passing through the center of the TFT substrate 10. For example, with respect to the 1st symmetry axis 1, the 2nd TP 1031 arranged at the corner P and the 1st TP 1022 arranged at the corner S are at the symmetrical positions, and the 1st TP 1021 and the 2nd TP 1032 are also at the symmetrical positions with respect to the 1st symmetry axis. The same with the 2nd symmetry axis.</p>
申请公布号 JP2000241786(A) 申请公布日期 2000.09.08
申请号 JP19990041351 申请日期 1999.02.19
申请人 NEC KAGOSHIMA LTD 发明人 NISHIDA TAKAYUKI
分类号 G02F1/13;G02F1/1333;G02F1/1345;G02F1/136;G02F1/1368;(IPC1-7):G02F1/13;G02F1/133 主分类号 G02F1/13
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