BIAS CIRCUIT OF SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To allow a bias current to speedily reach a specific level when the semiconductor integrated circuit has transition from a power-down state to an active state. SOLUTION: A 1st bias circuit 10 increases a current as the temperature rises. A 2nd bias circuit 20 decreases the current as the temperature falls. A current adding-up circuit 30 mirrors the current of the 1st bias circuit 10 in response to the signal at the output end of the 1st bias circuit 10 and the current of the 2nd bias current in response to the signal at the output end of the 2nd bias circuit 20, and puts both the mirror currents together to output a 1st bias current Ibias. A 1st pull-down means 60 lowers the voltage level at the output end of the 1st bias circuit 10 in response to a start pulse SP. A 2nd pull-down means 70 lowers the voltage level at the output end of the 2nd bias circuit 20 in response to the start pulse SP. An automatic pulse generator 90 generates the start pulse SP in response to the power-down signal PWRDN of the semiconductor integrated circuit.