发明名称 IMPROVED SEMICONDUCTOR TRENCH MOS DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce the structural difference between MOS components by bringing a first region into contact with one portion of a trench wall in contact with a dielectric layer that is covered with a conductive material and at the same time positioning the first region with a gap from the interface between the first and second layers in a second layer. SOLUTION: The entire upper surface of a work is thermally oxidized, an oxide layer 68 is formed on the surface of the work, and an opening 72 is provided on the oxide layer 68 by patterning using lithography. An N-doped region 74 is formed directly below the opening 72 via the opening 72, the region 74 is spread after a photo resist layer 70 is removed and is brought into contact with a gate oxide layer 60 that is one portion of a trench wall, thus forming a source region 24 of the first region. The source region 24 is positioned in a second layer 14 with a gap from the interface between a first layer 12 and a second layer 14 within the second layer 14.
申请公布号 JP2000243962(A) 申请公布日期 2000.09.08
申请号 JP20000044365 申请日期 2000.02.22
申请人 INTERSIL CORP 发明人 HAO JIFA;GREBS THOMAS EUGENE
分类号 H01L29/78;H01L21/336;(IPC1-7):H01L29/78 主分类号 H01L29/78
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