| 摘要 |
PROBLEM TO BE SOLVED: To reduce the number of times of access of an error correcting circuit to an RAM, and to quicken the error correcting circuit or a digital data processing circuit including the error correcting circuit by selecting a syndrome to be used for the next arithmetic operation from among obtained several syndromes, and outputting it from a syndrome arithmetic circuit. SOLUTION: A second arithmetic circuit fetches a syndrome outputted from a two system synchronous syndrome arithmetic circuit 101 in the timing of a reset signal inputted from a reset signal input terminal 114. Then, an error position polynomial and an error evaluation polynomial are generated based on this value. The error position polynomial and error evaluation polynomial generated by the second arithmetic circuit 202 are inputted to a third arithmetic circuit 203 in the timing of the next processing start signal. The position of an error and the value of the error are calculated based on the error position polynomial and the error evaluation polynomial in this circuit, and fetched in an error correcting circuit 204 by the next rest signal.
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