| 摘要 |
PROBLEM TO BE SOLVED: To enable wide cap challenge and improving the accuracy of a clock by deciding whether an analog reproduced signal is in a frequency lock state with a reproducing clock or not, oscillating a reproducing clock synchronizing with a frequency of a reproduced signal when it is not in a lock state, and oscillating a reproducing clock synchronizing with a phase synchronizing signal when it is in a lock state. SOLUTION: A phase error detector 101 detects the quantity of phase error, a frequency error detector 102 calculates the quantity of a frequency error and the quantity of an initial frequency error using the quantity of phase error. A switch 105 performs phase pull-in by turning off a circuit at the time of frequency pull-in and turning on a circuit after frequency clock by a frequency clock signal from a frequency clock detector 103. Analog quantity converted by D/A converters 107, 108 of which the gain is different from each other are added by an analog adder 110, inputted to a VCO 111, a clock having a frequency in accordance with an input signal is oscillated, after high speed frequency pull-in is performed, a phase is locked. |
