发明名称 POWER CONSUMPTION CALCULATION METHOD AND CALCULATION DEVICE FOR LOGIC CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a power consumption calculation method for a logic circuit and the calculation device capable of considering the intra-component power consumption of the logic circuit by input change and calculating accurate power consumption. SOLUTION: This method includes a process (S101) for identifying change signals in the logic circuit and the number of times of the change from the logical simulation result of the logic circuit, a process (S102) for identifying a component changed in its operation among the components constituting the logic circuit based on an identified result, recognizing, when one of the input/output signals of the component is changed, the operation state of the component from the logic value of the other input terminal and output terminal of the component and gathering the power consumption for each component state corresponding to the operation state, a process (S103) for calculating power consumed on the outer side of the component, a process (S104) for calculating the power consumption of the changing component from the power consumption for each component state and the power consumed on the outer side of the component and a process (S105) for calculating the power consumption of the entire logic circuit from the power consumption of the changing component. The power consumption consumed inside the component corresponding to the operation condition of the component is accurately calculated and the power consumption of the entire logic circuit is accurately calculated.
申请公布号 JP2000242676(A) 申请公布日期 2000.09.08
申请号 JP19990039756 申请日期 1999.02.18
申请人 NEC CORP 发明人 INAGAWA AKIKO
分类号 H01L21/822;G01R31/28;G06F17/50;H01L21/82;H01L27/04;(IPC1-7):G06F17/50 主分类号 H01L21/822
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