发明名称 Semiconductor memory, especially non-volatile memory with ferroelectric capacitors, has source-drain region formed before producing gate in trench self-aligned with the source-drain region
摘要 A semiconductor memory, comprising a source/drain region (5) formed before producing a gate (8a, 9a, 10a) in a trench (7) self-aligned with the source/drain region, is new. A semiconductor component comprises a source/drain region (5) formed in a semiconductor substrate (1) of opposite conductivity type, an interlayer insulation (6) formed on the substrate and including a trench (7) which is self-aligned with the source/drain region and which extends down to the substrate surface, and a gate (8a, 9a, 10a) formed on at least the inner wall of the trench. An Independent claim is also included for production of a semiconductor memory as described above. Preferred Features: The gate comprises a dielectric gate buffer film (8a), a ferroelectric gate film (9a) and a gate electrode (10a).
申请公布号 DE10008580(A1) 申请公布日期 2000.09.07
申请号 DE2000108580 申请日期 2000.02.24
申请人 SHARP K.K., OSAKA 发明人 MIYOSHI, TETSU;ISHIHARA, KAZUYA;KIJIMA, TAKESHI
分类号 H01L21/8247;H01L21/28;H01L21/8242;H01L27/10;H01L27/108;H01L27/115;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):H01L27/105;H01L21/823 主分类号 H01L21/8247
代理机构 代理人
主权项
地址