Method for creating a dynamic data flow design in a multiprocessor, multitask or multithread system.

摘要

Method for two entities (D1,D2), operating at different clock rates, to communicate via a buffer (B2). The buffer (B2) comprises an enable signal (S4) that constructs the output signal (S5) from the input signal (S3) by determining which values of the input signal (S3) are to be discarded and which values are to be taken into account. Exclusive access to the buffer (B2) is controlled by a semaphore mechanism. Full and empty signals control the reading from and the writing to the buffer (B2). <IMAGE>