| 摘要 |
A digital-versatile disk (DVD) playback-controller integrated circuit (IC) writes data to a block in an embedded memory buffer. The block has rows and columns. Row syndromes are generated on-the-fly as the data is written from the DVD disk to the memory buffer. Row syndrome generation thus requires no memory access cycles. Once errors in the rows identified by the row syndromes are corrected, column syndromes are generated. A multi-byte fetch supplies a multi-column syndrome generator with bytes in the row for two or more columns. The fetched bytes for the two or more columns are accumulated into intermediate syndromes. Fetched bytes are accumulated for other rows until all of the column's bytes in all rows have been fetched and accumulated. The final accumulated syndromes are output to an error corrector that detects, locates, and corrects any errors in the columns. The same error corrector can be used for row and column syndromes, even though a three-block-deep pipeline is used. Only one memory access cycle is required during column-syndrome generation for each row, even though two or more column syndromes are simultaneously generated. Pipelined registers for the intermediate syndrome bytes in the column-syndrome generator allow syndrome-calculation circuits to be shared for all column syndromes.
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