发明名称 Fast fourier transforming apparatus and method, variable bit reverse circuit, inverse fast fourier transforming apparatus and method, and OFDM receiver and transmitter
摘要 In fast Fourier transform, a necessary memory capacity is decreased, thereby decreasing a cost. The fast Fourier transform is performed on a symbol stored in a random access memory (RAM) by a butterfly operation unit in accordance with a RAM address generated by a RAM address generator. A RAM address conversion unit converts an input/output dummy address into an input/output real address by conducting bit reverse by a frequency specified in accordance with an input/output bit reverse signal, and converts a butterfly operation dummy address into a butterfly operation real address by conducting the bit reverse by a frequency specified in accordance with a butterfly operation bit reverse signal. In this manner, among output data of one symbol and input data of another symbol to be stored in the RAM subsequently to the output data of the one symbol, data having a common index indicating their orders in the symbols can be stored at the same address in the RAM. As a result, symbol input and symbol output can be overlapped.
申请公布号 US6115728(A) 申请公布日期 2000.09.05
申请号 US19980010499 申请日期 1998.01.21
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 NAKAI, YUJI;FURUTA, AKIHIRO
分类号 G06F17/14;(IPC1-7):G06F15/00 主分类号 G06F17/14
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