| 摘要 |
The present invention relates to a method and a programmable divider of a frequency of a clock signal by an integer by means of a counter, which is programmable by means of n binary signals representing the division ratio, and issuing n binary counting signals of increasing ranks and of decreasing respective frequencies, which consist of performing n-1 logic combinations of the counting signals, and selecting an output signal from among the n-1 logic combinations and n-1 counting signals.
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