发明名称 |
Wordline activation delay monitor using sample wordline located in data-storing array |
摘要 |
A wordline activation delay monitor circuit is disclosed herein which includes a sample wordline located within a data-storing array of a memory, wherein the sample wordline is selected or activated by circuitry having substantially the same structure or location within the memory as circuitry which selects or activates wordlines of the data-storing array. A circuit is disclosed which determines a wordline activation delay for a first subarray group within the memory by activating a sample wordline which is located within a data-storing array of a second subarray group. Corresponding methods are also disclosed.
|
申请公布号 |
US6115310(A) |
申请公布日期 |
2000.09.05 |
申请号 |
US19990225343 |
申请日期 |
1999.01.05 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
NETIS, DMITRY G.;JI, L. BRIAN;KIRIHATA, TOSHIAKI |
分类号 |
G11C8/14;G11C8/18;G11C11/408;G11C11/4091;(IPC1-7):G11C7/02 |
主分类号 |
G11C8/14 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|