LOW POWER DECODER CIRCUIT IN SYSTEM FOR MEASURING PRECHARGE AND PERFORMANCE

摘要

PURPOSE: A low power decoder circuit in a system for measuring precharge and performance is provided to minimize the power consumption of a system by reducing the switching ratio of a decoder using a high pass control buffer structure. CONSTITUTION: A low power decoder circuit is comprised of a precharge unit(11), a data load unit(12) and a decoder unit(20) with an additional control buffer(21). The precharge unit(11) precharges a system bus(10). The system load unit(12) loads data on the system bus(10). The decoder unit(20) decodes the loaded data. The control buffer(21), located in the input terminal of the decoder unit(20), controls so as to make a system bus value or a high value of the system bus only supply according to a required control signal level.