发明名称 Multiple threshold voltage transistor implemented by a damascene process
摘要 An ultra-large-scale integrated (ULSI) circuit includes MOSFETs which have different threshold voltages and yet have the same channel characteristics. The MOSFETs include gate structures with a polysilicon material. The polysilicon material is implanted with lower concentrations of germanium where lower threshold voltage MOSFETs are required. Over a range of 0-60% concentration of germanium, the threshold voltage can be varied by roughly 240 mV. A damascene process can be utilized to fabricate the MOSFETs.
申请公布号 US6114206(A) 申请公布日期 2000.09.05
申请号 US19980187171 申请日期 1998.11.06
申请人 ADVANCED MICRO DEVICES, INC. 发明人 YU, BIN
分类号 H01L21/336;H01L21/8234;(IPC1-7):H01L21/336 主分类号 H01L21/336
代理机构 代理人
主权项
地址