发明名称 Plural wells structure in a semiconductor device
摘要 Wells of a semiconductor device suitable for achieving high integration, and a method for forming the same are disclosed. The wells of a semiconductor device include a first conductivity type semiconductor substrate where a cell region and a periphery region are defined, a second conductivity type shield region in the entire cell region and in the entire periphery region at a depth below surface of the semiconductor substrate, a first conductivity type well on the second conductivity type shield region beneath the surface of the semiconductor substrate, a second conductivity type shield sidewall formed in the second conductivity type shield region and the first conductivity type well at border of the cell and periphery regions, a first conductivity type buried region formed at the second conductivity type shield region in the periphery region, and a second conductivity type well on the first conductivity type buried region in the first conductivity type well.
申请公布号 US6114729(A) 申请公布日期 2000.09.05
申请号 US19980200794 申请日期 1998.11.30
申请人 LG SEMICON CO., LTD. 发明人 PARK, SEONG HYOUNG;KIM, JONG KWAN
分类号 H01L21/8249;H01L21/22;H01L21/265;H01L21/74;H01L21/822;H01L27/06;(IPC1-7):H01L29/76 主分类号 H01L21/8249
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