发明名称 |
Method and apparatus for multiple row activation in memory devices |
摘要 |
A memory device test circuit and method are described. These operate to maintain a local phase signal active over multiple row activate commands. As a result, an arbitrary number of word lines may be activated together, in an arbitrary order and in arbitrary locations, in response to user-programmable instructions. This allows test sequences to be tailored after the memory device has been designed and can greatly reduce testing times for memory devices.
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申请公布号 |
US6115306(A) |
申请公布日期 |
2000.09.05 |
申请号 |
US19990384134 |
申请日期 |
1999.08.27 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
SHORE, MICHAEL A.;MULLARKEY, PATRICK J. |
分类号 |
G11C7/00;G11C29/00;G11C29/34;(IPC1-7):G11C8/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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