COMBINED LEADING ONE AND LEADING ZERO ANTICIPATOR

摘要

PURPOSE: An LOA(Leading One Anticipator) coupled with an LZA(Leading Zero Anticipator) is provided to present a circuit for calculating binary numbers, recognizing and counting the leading ones and leading zeros in the numbers. CONSTITUTION: A multiplier(14) in a mantissa part(10) multiplies normalized binary numbers(A,B) by each other. A sorter(18) sorts the bits of a binary number(C). An XOR gate(20) makes a complement of the sorted number(C) in response to a signal(21). Adders(22,23) adds the multiplication result of the numbers(A,B) to the complement of the sorted number(C). The output of an adder(23) is applied to a normalizer(24). An LOA/LZA(28) performs a logical operation in order to indicate a leading one or zero of the result from the adder(22). The output of the LOA/LZA(28) is applied to a multiplexor(30). A post-normalization count logic circuit(32) converts a count signal from the LOA/LZA(28) to a shift signal for a post-normalizer(24). If a normalized number has a negative sign, an increment part(38) adds one to the normalized number, and thereby completes two's complement conversion. The part(38) may be used for a rounding operation. The post-normalizer(24) is implemented by a simple shifter.