Timer circuit for time control of signal used for test of semiconductor component in semiconductor test system, has second fine delay circuit that receives output signal of first fine delay circuit

摘要

A coarse delay circuit and a second fine delay circuit are formed in a first integrated semiconductor circuit. A first fine delay circuit and a selecting circuit are formed in a second integrated semiconductor circuit, which has a higher calculating speed than the first integrated semiconductor circuit. The coarse delay control circuit consists of a counter/meter (11), a register (12), a comparator (13), a flip-flop (14) and an AND gate (16). The counter/meter (11) measures the reference clock, whose data may be compared with that in the register (12) using by the comparator (13). An Independent claim is included for: (a) a method for generating a time control signal for testing a semiconductor component