| 摘要 |
A multiplexing/demultiplexing apparatus in a digital communication system with a variable frame structure and a method of controlling the same. The apparatus comprises a first FIFO unit for buffering data inputted at a fixed speed, a first write controller for outputting a first write address to the first FIFO unit in response to a first data input clock, a first read controller for outputting a first read address to the first FIFO unit in response to a first data output clock, a stuff/delete determination unit for generating stuff and delete indication signals, a multiplexer for multiplexing output data from the first FIFO unit to output frame data, a demultiplexer for demultiplexing the frame data from the multiplexer, a second write controller for generating a second write address in response to a write enable signal from the demultiplexer and a second data output clock, second read controller for generating a second read address in response to a second data input clock, a clock adjustment unit for outputting the second data input clock to the second read controller, and a second FIFO unit for storing output data from the demultiplexer in response to the second write address from the second write controller and outputting the stored data in response to the second read address from the second read controller.
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