发明名称 |
System for indicating status of a buffer based on a write address of the buffer and generating an abort signal before buffer overflows |
摘要 |
A buffer memory control device comprises a buffer memory which is divided into memory areas in cell units each consisting of plural pieces of data by addresses; a write address generation circuit for outputting a write address of the buffer memory; a read address generation circuit for outputting a read address of the buffer memory; a first register for decoding the write address, thereby outputting a flag signal indicating a write address before completion of writing data for each cell; a data decision circuit for deciding presence/absence of cell unit data in the buffer memory and performing read control of the buffer memory on the basis of the flag signal; a second register for decoding the read address, thereby indicating completion of reading data for each cell and outputting a flag reset signal for resetting the flag signal; and an overflow occurrence notification circuit for notifying a transfer source of overflow in the buffer memory on the basis of the flag signal, the data decision circuit performing read control of the buffer memory, and notifying a transfer source that transfer of write data should be aborted before the buffer memory overflows, and data being transferred for each cell, thereby avoiding loss of data.
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申请公布号 |
US6112268(A) |
申请公布日期 |
2000.08.29 |
申请号 |
US19980097079 |
申请日期 |
1998.06.12 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
OHASHI, MASAHIRO;YAMAMOTO, TAKASHI;MORIIWA, TOSHIHIRO |
分类号 |
G06F5/10;G06F5/14;(IPC1-7):G06F13/14;G06F12/00;G06F13/00 |
主分类号 |
G06F5/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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