发明名称 Logic signal output buffer circuit
摘要 An output buffer circuit for logic signals produces an output logic signal from an input logic signal. It comprises a storage circuit capable of storing the logic state of the input signal and an output stage to produce the output signal as a function of the logic state stored in the storage circuit. A control circuit comprises a circuit for the comparison of the input and output signals. The control circuit produces an updating command signal whose logic state represents the relationship existing between the logic states of the input and output signals. This updating signal activates the storage, in the storage circuit, of the state of the input signal.
申请公布号 US6111426(A) 申请公布日期 2000.08.29
申请号 US19970926814 申请日期 1997.09.09
申请人 SGS-THOMSON MICROELECTRONICS S.A. 发明人 GAULTIER, JEAN-MARIE
分类号 G11C8/06;H03K19/003;H03K19/0185;(IPC1-7):H03K17/16;H03K19/017 主分类号 G11C8/06
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