发明名称 |
Synchronous burst nonvolatile semiconductor memory |
摘要 |
A synchronous semiconductor burst nonvolatile semiconductor memory includes first and second address counter circuits and a counter selection circuit in order to output an address signal to a first latch circuit for storing therein data from a memory cell. Either the first address counter circuit or the second address counter circuit is alternately selected by the counter selection circuit in response to a burst control signal. According to the invention, either the first address counter circuit or the second address counter circuit is always selected, and a burst address signal is outputted to the latch circuit on the basis of an externally supplied address signal (first signal of the burst address signal) before the burst control signal is generated.
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申请公布号 |
US6111815(A) |
申请公布日期 |
2000.08.29 |
申请号 |
US19990418307 |
申请日期 |
1999.10.14 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
TAKEDA, KEIICHIRO |
分类号 |
G11C17/00;G11C11/407;G11C16/02;G11C16/06;G11C17/12;(IPC1-7):G11C8/00 |
主分类号 |
G11C17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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