发明名称 SIGNAL PROCESSING CIRCUIT AND SIGNAL PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a signal processing unit that is operated stably in the case that the signal processing unit is in operation synchronously with other signal processing unit. SOLUTION: The signal processing unit is provided with a sensing period identification circuit, which detects timing when a vertical synchronizing signal Vsync1 has a pulse edge, uses a pixel clock signal on the basis of the detected timing to specify a sensing period, outputs a reset signal on the basis of the detected timing, generates a vertical synchronizing signal Vsync2, discriminates whether or not the detected timing is resident within the sensing period, outputs the reset signal when it is discriminated that the detected timing is resident within the sensing period, generates the vertical synchronizing signal Vsync2 on the basis of the detected timing, outputs the reset signal in timing decided on the basis of the pixel clock signal when discriminating that the detected timing is not within the sensing period and generates the vertical synchronizing signal Vsync2.
申请公布号 JP2000236455(A) 申请公布日期 2000.08.29
申请号 JP19990037327 申请日期 1999.02.16
申请人 SONY CORP 发明人 ONO KAZUYA
分类号 H04N5/073;A63F13/00;A63F13/12;G09G5/12 主分类号 H04N5/073
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