发明名称 Graphic editor for block diagram level design of circuits
摘要 A method is described herein for designing a circuit using graphic editor software. A graphic design file is generated corresponding to a block diagram created in a graphical user interface associated with the graphic editor software. The block diagram includes a plurality of blocks and a plurality of conduits interconnecting the blocks. A block design file is generated in one of a plurality of formats for each of selected ones of the plurality of blocks in the block diagram. Each of the block design files corresponds to an implementation of its corresponding block. Modifications to any of the graphic design file and the block design files are incorporated into each other under software control.
申请公布号 US6110223(A) 申请公布日期 2000.08.29
申请号 US19970958434 申请日期 1997.10.27
申请人 ALTERA CORPORATION 发明人 SOUTHGATE, TIMOTHY J.;WENZLER, MICHAEL
分类号 G01R31/317;G01R31/3177;G01R31/3185;G06F9/44;G06F9/445;G06F11/14;G06F11/273;G06F11/28;G06F12/00;G06F17/50;G06Q10/00;H01L21/82;(IPC1-7):G06F17/50 主分类号 G01R31/317
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