| 摘要 |
A system and method are presented for forming a grid array device package around an integrated circuit (i.e., chip). The device package includes a substrate, a stiffener, a heat spreader, and an optional heat sink. The chip includes multiple I/O pads arranged upon an underside surface. The substrate includes a first set of bonding pads on an upper surface configured to vertically align with the I/O pads. The chip is connected to the first set of bonding pads using the C4 method. The stiffener, a rigid member able to retain its shape during C4 heating, may be attached to the upper surface of the substrate prior to the C4 process, helping the substrate maintain its planarity during and after the C4 process. The stiffener has an opening dimensioned to receive the chip and exposing the first set of bonding pads. Following the C4 process, a first space between the underside surface of the chip and the upper surface of the substrate is filled with an underfill material. A second space between the side surfaces of the chip and side walls of the opening in the stiffener is filled with an underfill material or a thermal interface material. The underfill or interface material filling the second space provides additional thermal paths for heat energy to flow from the chip to the ambient. The heat spreader is attached to upper surfaces of the stiffener and the chip, and the heat sink is optionally attached to the upper surface of the heat spreader.
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