| 摘要 |
PURPOSE: A mirror circuitry for a noise reduction is provided to reduce a pattern dependent noise generated by the digital processing portion in a combination digital processing system/analog processing system, such as a delta-sigma converter. CONSTITUTION: A delta-sigma analog/digital converter is provided for operating in the analog domain to generate a digital value that is to be processed by a digital signal processor (DSP)(26) to provide on the output a digital output. Each data node in each processing element in the DSP(26) is mirrored by the way of a corresponding data node in the mirror circuit(36). This results in the addition of noise via a noise adder(28) such that each data node in the main portion of the DSP(26) that can draw current from the power supply during a transition will have a corresponding complement node in the mirror circuit(36). Each data node in the mirror circuit will add noise via a transition drawing current from the power supply whenever the transition does not occur at the corresponding data node in the main portion of the DSP(26). Therefore, di/dt noise will be added for each cycle, regardless of the data pattern. This is effected by insuring that, for each data cycle, each data node undergoes a positive and a negative transition. By using a return-to-zero data stream, i.e., inserting a zero in each cycle at each data node, a positive transition and a negative transition can be during each data cycle.
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