发明名称 (A) ;OPTICAL SWITCH ARRAY
摘要 PURPOSE:To provide a PLL circuit capable of reducing noise and jitter. CONSTITUTION:In the PLL circuit 8 constituted of a phase comparator 2, a loop filter 3 and a voltage controlling oscillator 4, the 1st resistor R1 is connected between the output terminal 9 of, the filter 3 and a power supply terminal 10, the 2nd resistor R2 is connected between the terminal 9 and ground 11, and when the PLL circuit 8 is turned to a lock state, noise is hardly added to the terminal 9 of the loop filter 3.
申请公布号 JP3081718(B2) 申请公布日期 2000.08.28
申请号 JP19920303795 申请日期 1992.11.13
申请人 发明人
分类号 H03L7/093 主分类号 H03L7/093
代理机构 代理人
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