| 摘要 |
An adder which accepts operand data in multiple word-size formats and which generates sum outputs at speeds substantially independent of the format or formats of the data. In general, if the maximum word-size of the adder is N bits, it will perform two N/2-bit additions, four N/4-bit additions, etc. A combination of a carry-select algorithm and a forward carry calculation method generate a carry-out value from a given set of input operand bits independently of the sum value of the inputs. In a first aspect, such an adder for generating the sum of two operands comprises a plurality of substantially identical adder modules diposed in pairs, a first adder in each pair having a carry input set to a logical zero value and a second adder in each pair having a carry input set to a logical one value; the adder modules generating substantially all possible sum and carry output values from operand and carry input values; and a multiplexer network selects from the possible sum and carry outputs the correct values to provide the sum of the operands. Circuitry is provided for forced setting the carry-out values from modules to operand-independent logic levels. This allows modules to be operated independently of one another, permitting multi-format use of the modules to form adders of selectable word size.
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