| 摘要 |
PCT No. PCT/JP96/01166 Sec. 371 Date Oct. 31, 1997 Sec. 102(e) Date Oct. 31, 1997 PCT Filed Apr. 26, 1996 PCT Pub. No. WO96/35992 PCT Pub. Date Nov. 14, 1996A display apparatus performs pixel density conversion processing, such as enlargement, reduction, and rotation, on an original image and displays a resultant image an image processing apparatus and, more particularly, a processing apparatus, for performing a high-speed filtering operation, such as data interpolation, involving pixel density conversion processing, uses a memory having an arithmetic function for use in the high-speed filtering operation. The apparatus provides a fraction address including a fraction component of an original image that generally does not provide integer coordinates and a semiconductor memory 100 incorporates a memory cell 207 for holding data corresponding to an integer address, arithmetic circuits 202 and 203 for performing interpolation based on the data corresponding to an integer component of the fraction address read from the memory cell and the fraction component, and an address range determining block 216 for determining whether the above-mentioned given fraction address is in the range of addresses of the data held in the memory cell in the above-mentioned semiconductor memory.
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