发明名称 Low power buffer circuit and method for generating a common-mode output absent process-induced mismatch error
摘要 A buffer circuit or output driver can produce a common-mode output and maintain fully differential input signals to the buffer. The common-mode output is derived by shifting the input voltages to the buffer by a threshold amount, averaging the shifted input voltages through a resistor divider, then again-shifting the resulting voltage to an output node of the buffer. The voltages at which the first and second shifts occur are equal but in opposite direction. Accordingly, the output voltage is at a midscale, average or common-mode voltage of the input voltages applied to the buffer. The output voltage has sufficient swing head room and is well suited for low power applications. The buffer circuit utilizes relatively few transistors and only two major current paths from the power supply to ground. Accordingly, the buffer consumes relatively low amounts of power. All of the critical transistors within the buffer are of the same doping type, concentration and implant profile to assure the upward and downward shifts are substantially equal based on the threshold voltages of the critical transistors.
申请公布号 US6107859(A) 申请公布日期 2000.08.22
申请号 US19970989707 申请日期 1997.12.12
申请人 CYPRESS SEMICONDUCTOR CORP. 发明人 MOYAL, NATHAN Y.
分类号 H03F3/45;(IPC1-7):H03F3/45;H03K19/018 主分类号 H03F3/45
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