发明名称 Silicide layer forming method and semiconductor integrated circuit
摘要 A surface of a conductive member such as a gate electrode provided with a silicon layer is roughened. The roughened silicon layer is silicified so that its width is substantially increased, whereby phase transition of the silicide layer is simplified. Thus, the resistance of the refined silicide layer is reduced due to the simplified phase transition.
申请公布号 US6107156(A) 申请公布日期 2000.08.22
申请号 US19990429395 申请日期 1999.10.28
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 SHIMIZU, SATOSHI;ODA, HIDEKAZU
分类号 H01L21/28;H01L21/285;H01L21/3205;H01L21/321;H01L21/3213;H01L21/336;H01L29/423;H01L29/78;(IPC1-7):H01L21/824 主分类号 H01L21/28
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