发明名称 Method for aligning clock and data signals received from a RAM
摘要 One embodiment of the present invention provides a method for aligning a data signal and a data clock signal received from a memory during a read operation. The method includes receiving the data signal and the data clock signal from the memory, and determining an offset between these signals. If the offset is outside of a valid range, the system adjusts a delay between the data clock signal and the data signal. In a variation on the above embodiment, the method is performed by special-purpose hardware located in a memory controller, and operates periodically while the computer system is running. In another variation, the method is carried out by a BIOS program stored in read only memory, and operates during system startup.
申请公布号 US6108795(A) 申请公布日期 2000.08.22
申请号 US19980183781 申请日期 1998.10.30
申请人 MICRON TECHNOLOGY, INC. 发明人 JEDDELOH, JOSEPH M.
分类号 G06F1/04;G06F12/00;(IPC1-7):G06F1/04 主分类号 G06F1/04
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