发明名称 |
FRAME SYNCHRONIZING DEVICE/METHOD |
摘要 |
PROBLEM TO BE SOLVED: To avoid synchronism failure and erroneous synchronism without raising the redundancy of a unique word. SOLUTION: A GOLAY decoding circuit 205 executes GOLAY decoding on the candidate part of the header of a reception signal stored in a buffer and counts the number of erroneous bits. A threshold control circuit 206 controls the threshold of a synchronism decision circuit 207 on the basis of the counted number of erroneous bits. A unique word(UW) comparison circuit 204 calculates the correlation value between the candidate part of the unique word of the reception signal stored in the buffer 202 and a unique word inputted from the UW generation circuit 203. The synchronism decision circuit 207 compares the sizes of the correlation value inputted from the UW comparison circuit 204 and the threshold controlled by the threshold control circuit 206. When the correlation value is larger than the threshold, the candidate part of the unique word of the reception signal is decided to be the real unique word. |
申请公布号 |
JP2000232438(A) |
申请公布日期 |
2000.08.22 |
申请号 |
JP19990031331 |
申请日期 |
1999.02.09 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
IDO TAIJI |
分类号 |
H04J3/06;H04L7/00;H04L7/08 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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