发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND SOLID-STATE IMAGING ELEMENT
摘要 PROBLEM TO BE SOLVED: To restrain the formation of a biased lamination layer by a method wherein the impurity concentration in a first region of first conductivity type is made higher than that in a second region of first conductivity type. SOLUTION: The impurity concentration in an N-type first low-concentration epitaxial growth layer 103 is formed moderately higher than that in a second epitaxial growth layer 104. The temperature of the N-type impurities in such the layer 103 becomes a high temperature at the time of the formation of the N-type second low-concentration epitaxial growth layer 104, in short, at the time of the second-time epitaxial growth of the layer 104 and the N-type impurities are diffused in the side of the upper layer (the opposite side to a substrate) of the layer 103 in a thickness of about 1μm. P-type impurities 313, which are specially mixed remarkedly in the layer 103 at the time of this second-time epitaxial growth, can be offset with the N-type impurities, which are diffused in such a manner, to a certain degree. Accordingly, the formation of a biased lamination layer becomes a negligible degree.
申请公布号 JP2000232214(A) 申请公布日期 2000.08.22
申请号 JP19990034222 申请日期 1999.02.12
申请人 NIKON CORP 发明人 SUZUKI SATOSHI
分类号 H01L31/10;H01L21/205;H01L27/146;(IPC1-7):H01L27/146 主分类号 H01L31/10
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